1. Technical Field
The present invention relates to control technologies of a controller in a memory module, and more particularly, to an oversampling method for data signal and oversampling apparatus thereof.
2. Related Art
Please refer to FIG. 1, in which a memory module 10 includes a dynamic random access memory (DRAM) 12 and a controller 14. The controller 14 uses a data signal DQ and a data strobe signal DQS to access the DRAM 12. Generally, upon delivery, the memory module 10 is designed to provide a time delay, to delay the data signal DQ and/or data strobe signal DQS, thereby achieving the optimal performance of control over the DRAM 12. A delay chain 142 is generally used in the controller 14 to provide the required time delay.
However, due to influences of changes of external factors such as temperature, the phase difference between the data signal DQ and the data strobe signal DQS may not be maintained constantly. The time delay of the delay chain may also vary with changes of external factors such as temperature and voltage. These factors will cause actual sampling points to deviate from the optimal sampling point of the data signal DQ, thereby leading to an error in data sampling.
In actual applications, a sampling circuit 140 in the controller 14 may first enter a calibration mode. In the calibration mode, the sampling circuit 140 may adjust the time delay of the delay chain through known data sent from the DRAM 12 to the controller 14, to accurately receive the data sent from the DRAM 12, thereby obtaining an optimal position of sampling the data signal DQ with the data strobe signal DQS. Consequently, although the problem of deviation of the actual sampling points can be solved by frequently entering the calibration mode, too many calibrations may affect normal exchange of data, thereby reducing the efficiency of the memory module 10.
Furthermore, as the operating frequency of the memory module 10 is increasingly raised, a relatively effective sampling window is narrowed down, so that the problem brought about by deviation of the sampling points is more severe and becomes a key factor that holds back the raising of the operating frequency of the memory module 10.